03/03/2026 News & Events - #events Let’s meet at Embedded World 2026 Visit BUGSENG and Solid Sands in Hall 4, Booth 548. Stop by and let’s discuss how we can help you achieve certification through MISRA compliance, functional safety expertise, and robust qualification strategies. BOOK A MEETING The embedded world Exhibition&Conference is the global platform, the industry meeting place for the embedded community, leading experts, key players and industry associations. Its clear focus and specialization on technologies, processes and future-oriented products, combined with top-class expert knowledge, make the event unique in an international comparison and THE must-attend event for the industry. Register to the event and get free tickets through our voucher code ew26567616! REDEEM VOUCHER NOW Conference With its comprehensive and high-quality conference and supporting program, embedded world bundles know-how at the highest level. You can follow BUGSENG at the conference attending these talks: When: Tuesday, 10 March 2026 | 17:00-17:30 CET Session: 5.3 MISRA SW Coding Guidelines Authors: Roberto Bagnara, Nicola Vetrini, and Abramo Bagnara. High-Quality Code Meets Industry Standards: Linux and MISRA in Perspective There is considerable empirical evidence that the Linux kernel exhibits high code quality: low static-defect density, rigorous peer review, extensive automated testing, and operational reliability demonstrated by long uptimes in enterprise and industrial deployments, including safety-critical contexts. By design, the MISRA C and MISRA C++ coding standards aim to ensure that code quality is never compromised by compliance. Consider a guideline violation in the kernel: either the maintainer can provide a convincing argument that the code is safer and of higher quality as it stands, leading to a justified deviation, or such an argument is lacking, in which case the code must be changed. Ignoring economic and timing constraints, resolving all violations in this manner would yield a MISRA-compliant Linux kernel in the strict sense of MISRA Compliance:2020. In this talk (and corresponding paper), however, we do account for those constraints, and we address two central questions: Is it conceivable to achieve MISRA compliance for the kernel’s core modules, and at what cost? Is MISRA C sufficiently flexible to accommodate high-quality code, or are refinements needed to improve its general applicability? In doing so, we further refine the notion of “tailoring” of the MISRA guidelines, something we already successfully applied in the context of the Xen hypervisor and the Zephyr RTOS. When: Wednesday, 11 March 2026 | 13:45-14:15 CET Session: 2.5: Zephyr in Safety Critical Applications Authors: Roberto Bagnara, Ayoub Bourjilat (AC6), Luca Ciucci, Roy Jamil (AC6), and Nicola Vetrini. Industrializing Zephyr for Safety-Critical Products: A Four-Pillar CI Playbook In this talk and the corresponding paper, we provide a pragmatic starting point for teams taking Zephyr-based application software from proof-of-concept to safety-readiness. We show how to operationalize four pillars: I. requirements & traceability; II. software architectural constraints (SACS); III. coding-guideline enforcement, and IV. testing, directly in CI so that every change produces auditable evidence. Pillar I (specify & link): manage functional and non-functional software requirements in a versioned catalog; annotate code and tests with stable IDs; generate a traceability matrix on every build and fail fast on broken links. Pillar II (design & constrain): encode SACs as verifiable rules, layering/no-bypass, HAL-only MMIO, header visibility, single-writer ownership, and check the whole tree in CI; freeze Kconfig/Devicetree per variant and track changes. Pillar III (implement safely): enforce a MISRA-based policy with static analysis and coding style; baseline once, gate “no new violations,” and record deviations as per MISRA Compliance:2020. Treat the Zephyr kernel as adopted code; treat application/wrappers/local drivers as native code. Pillar IV (verify continuously): run requirements-based unit/integration tests with Ztest/Twister on native_sim and boards; emit machine-readable reports (JSON/XUnit) and gate on coverage thresholds. An accompanying GitHub repository contains pipeline templates, gating criteria, and checklists teams can adapt to their boards and SIL/ASIL targets within days. FULL CONFERENCE PROGRAM More information: Embedded World.
