WORKSHOP ON SOFTWARE RELIABILITY FOR MADRID FLIGHT ON CHIP

Tue, 11/05/2019 - 10:07

26th November, IMDEA Software Institute, Madrid

We are glad to announce that our CTO Roberto Bagnara will be one of the MFoC Workshop speakers.

Here is a sneak peek at his talk: "Precise approximation of Floating-Point Computations for C/C++ Software Using the Mathematical Libraries".


Verification of C/C++ programs has seen considerable progress in several areas, but not for programs that use these languages' mathematical libraries.  The reason is that all libraries in widespread use come with no guarantees about the computed results. This would seem to prevent any attempt at formal verification of programs that use them: without a specification for the functions, no conclusion can be drawn statically about the behavior of the program. We propose an alternative to surrender: even if we do not have a proper specification for the functions, we might have a partial specification; at the very least we have their implementation, for which a partial specification can sometimes be extracted.  When even a  partial specification is unavailable, we can still detect flaws in the program and facilitate its partial verification with testing. Our proposal provides a pragmatic, practical approach that enables program verification via abstract interpretation, symbolic model checking and constraint-based test data generation.

 

About the MFoC Workshop:

The workshop will bring experts from model based design and testing, formal methods, software engineering, static analysis and automated testing to discuss their techniques and potential applications to critical aerospace software.

The recently funded MFoC project (Madrid Flight on Chip) is devoted to the exploration and development of novel techniques from hardware and software for the incipient revolution in satellite missions. Due to recent dramatic cost reduction in launching satellites, hardware and software costs now massively dominate the costs and times of these missions. This calls (1) for the usage of conventional hardware platforms and (2) for the search, development and application of techniques to accelerate software development processes of on-board software from other areas of software reliability.

 

 

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